Optimization for the Locations of Decoupling Capacitors in Suppressing the Ground Bounce by Genetic Algorithm

نویسندگان

  • Kai-Bin Wu
  • An-Shyi Liu
  • Guang-Hwa Shiue
  • Chien-Min Lin
چکیده

In the high-speed digital printed circuit board, decoupling capacitors play an important role in lowering the power-ground planes impedance leading to the ground bounce noise in I/O ports while the logic is in transition. This paper investigates the optimal placement of decoupling capacitors in suppressing the input and transfer impedances of power-ground planes. The cavity model combines with genetic algorithm (GA) here to find the design specification and the optimal placement of the decoupling capacitors. Introduction As the clock frequency increases and rise time decreases in high-speed digital printed circuit boards, noise on the power bus will be incurred due to a sudden change during the high-to-low and low-to-high transitions, called simultaneous switching noise, delta-I noise, or ground bounce. This noise may result in signal integrity and electromagnetic interference problems in high-speed digital systems, such as the wrong judgment of digital system logics. In the past, many researches had been done to model the power-ground planes, such as the full-wave electromagnetic model, the partial element equivalent circuit (PEEC) model, and cavity model. The full-wave electromagnetic model is based on Maxwell’s electromagnetic equations and solved by the numerical methods such as the finite-difference time-domain (FDTD), finite element method (FEM), and moment of methods (MoM). The partial element equivalent circuit method divides the power-ground planes into unit cells and estimates the equivalent resistance, inductance, conductance, and capacitance for each cell. The cavity model [1] is thus employed to obtain the input and transfer impedances by the Green’s function. Although a few models have been proposed, none of them were mentioned for the optimal placement of decoupling capacitors. The cavity model is proposed to calculate the n-port impedance matrix among the vias and explore the possible locations of decoupling capacitors on the power-ground plane. In view of the time-consuming analysis for doubly infinite series of Green’s function in the cavity model, a simplified form has been derived to speed up the computation [2]. Furthermore, the genetic algorithm (GA) [3] is applied to search for the optimal locations of decoupling capacitors so as to minimize the input and transfer impedances over a desired range of frequencies. Finally, typical examples based on the proposed approach are presented and from which some of the efficient ways in suppressing the ground bounce by decoupling capacitors are discussed. Cavity Model for Power/Ground Planes Considering a pair of rectangular planes as depicted in Fig.1, its physical structure is constructed by the length a, width b, and thickness d and filled with the substrate permittivity of ε.

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تاریخ انتشار 2006